Implementasi Hazard Detection dan Data Forwarding pada Soft-core Prosesor Sederhana
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Abstract
Abstract—This paper presents the implementation of hazard detection and data forwarding in the pipeline concept used in developing TEUS-1, a simple, 16-bit, soft-core processor. This processor is planned to be used for the learning process related to examples of processor design for undergraduate students. The pipeline implemented on TEUS-1 is 5 stages. In initial testing, 10 data hazards were found due to the existence of data dependencies between sequential instructions. In order to eliminate these data hazards, an interlocking algorithm and a data forwarding algorithm has been added to the instruction decoding section and to the execution unit section, respectively. With the addition of this algorithm, all data hazards found during initial testing can be eliminated.
Keywords: hazard detection, data forwarding, interlocking, data hazard, pipeline
Abstrak—Makalah ini mempresentasikan tentang implementasi dari hazard detection dan data forwarding pada konsep pipeline yang digunakan dalam pengembangan soft-core prosesor sederhana, yaitu TEUS-1. Prosesor ini merupakan prosesor 16 bits yang rencananya akan digunakan untuk proses pembelajaran terkait dengan contoh desain prosesor untuk mahasiswa program Sarjana. Pipeline yang diimplementasikan pada TEUS-1 adalah 5 stages. Dalam pengujian awal, ditemukan adanya 10 data hazard akibat dari adanya data dependencies antar instruksi yang berurutan. Untuk menghilangkan data hazard ini, telah ditambahkan algoritma interlocking pada bagian instruction decoding dan algoritma data forwarding pada bagian execution unit. Dengan adanya penambahan algoritma ini, seluruh data hazard yang ditemukan pada saat pengujian awal dapat dihilangkan.
Kata kunci: hazard detection, data forwarding, interlocking, data hazard, pipeline
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References
AMD MicroBlaze Processor: A Flexible and Efficient Soft Processor. (2023). https://www.xilinx.com/products/design-tools/microblaze.html
Barthe, L., Cargnini, L. V., Benoit, P., & Torres, L. (2011). The SecretBlaze: A Configurable and Cost-Effective Open-Source Soft-Core Processor. 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum, 310–313. https://doi.org/10.1109/IPDPS.2011.154
Cheah, H. Y., Brosser, F., Fahmy, S. A., & Maskell, D. L. (2014). The iDEA DSP Block-Based Soft Processor for FPGAs. ACM Transactions on Reconfigurable Technology and Systems, 7(3), 1–23. https://doi.org/10.1145/2629443
Cheah, H. Y., Fahmy, S. A., & Maskell, D. L. (2012). iDEA: A DSP block based FPGA soft processor. 2012 International Conference on Field-Programmable Technology, 151–158. https://doi.org/10.1109/FPT.2012.6412128
Cheah, H. Y., Fahmy, S. A., Maskell, D. L., & Kulkarni, C. (2012). A lean FPGA soft processor built using a DSP block. Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 237–240. https://doi.org/10.1145/2145694.2145734
Figueroa, F. A. G. (2012). Natalius 8 bit RISC. https://opencores.org/projects/natalius_8bit_risc
Hermawan, H. (2012). Leveraging FPGA Resources for Parallel System-on-Chip [Master’s Dissertation]. Nanyang Technological University.
Jean-Loup Baer. (2009). Microprocessor Architecture: From Simple Pipelines to Chip Microprocessors. Cambridge University Press.
Kranenburg, T., & van Leuken, R. (2010). MB-LITE: A robust, light-weight soft-core implementation of the MicroBlaze architecture. 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), 997–1000. https://doi.org/10.1109/DATE.2010.5456903
LaForest, C. E., & Steffan, J. G. (2012). OCTAVO: An FPGA-centric Processor Family. Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 219–228. https://doi.org/10.1145/2145694.2145731
Nurmi, J. (Ed.). (2007). Processor Design: System-on-Chip Computing for ASICs and FPGAs. Springer.
OpenCores. (n.d.). Retrieved December 1, 2023, from https://opencores.org/
Parrilla, L., García, A., Castillo, E., Álvarez-Bermejo, J. A., López-Villanueva, J. A., & Meyer-Baese, U. (2022). Dracon: An Open-Hardware Based Platform for Single-Chip Low-Cost Reconfigurable IoT Devices. Electronics, 11(13), 2080. https://doi.org/10.3390/electronics11132080
Patterson, D. A., & Hennessy, J. L. (2020a). Computer Organization and Design MIPS Edition: The Hardware/Software Interface (Sixth Edition). Morgan Kaufmann.
Patterson, D. A., & Hennessy, J. L. (2020b). Computer Organization and Design RISC-V Edition: The Hardware/Software Interface (Second Edition). Morgan Kaufmann.
Schleuniger, P., McKee, S. A., & Karlsson, S. (2012). Design Principles for Synthesizable Processor Cores (pp. 111–122). https://doi.org/10.1007/978-3-642-28293-5_10
Shen, J. P., & Lipasti, M. H. (2013). Modern Processor Design: Fundamentals of Superscalar Processors. Waveland Press.
Silc, J., Robic, B., & Ungerer, T. (1999). Processor Architecture: From Dataflow to Superscalar and Beyond. Springer.
Tong, J. G., Anderson, I. D. L., & Khalid, M. A. S. (2006). Soft-Core Processors for Embedded Systems. 2006 International Conference on Microelectronics, 170–173. https://doi.org/10.1109/ICM.2006.373294
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